SystemVerilog

OpenTPU is an open-source AI accelerator project with RTL, ISA, simulator, compiler, profiler, and host software in one repo. The page shows it running real models like Qwen and LFM on a Kintex-7 PCIe card, with detailed performance results and documentation links.

MCP server for letting AI assistants explore elaborated SystemVerilog designs and gate-level netlists with structured queries, hierarchy navigation, and source references.

An educational project that explains and demonstrates a homemade language processing unit inspired by Groq’s LPU, with a focus on running a small Transformer model and visualizing the idea behind AI hardware.